The present invention relates to a semiconductor integrated circuit technique and, more particularly, to a technique which is effective when applied to a semiconductor integrated circuit device having a rewritable read only semiconductor memory, e.g., to a single chip micro computer having a built-in EPROM (i.e., Electrically Programmable Read Only Memory).
A data processing LSI (i.e., Large Scale Integrated circuit) such as a single chip microcomputer (hereafter referred to as a "single-chip micon") is typically equipped integrally with a ROM (i.e., Read Only Memory) for storing the operation programs or the like of a system. The built-in ROM of the single-chip micon is generally constructed of a mask ROM which cannot be rewritten. A rewritable memory called an "EPROM" is mounted on the LSI package.
Here, a single-chip micon having a mask ROM on the chip is disclosed relatively in detail on pp. 45 to 82, Semiconductor Data Book entitled "8/16 Bit Micro Computer" issued by Hitachi, Ltd., in September, 1982, and a single-chip micron having the EPROM on the package is also disclosed on pp. 350 to 389 of the same Data Book.
The aforementioned ROM-mounted, including that of the on-chip type, single-chip micon is constructed such that a sense amplifier or a read circuit is operating continuously during the reading cycle of the ROM. However, the sense amplifier of the ROM mounted on the single-chip micon need not operate continuously during the reading cycle. The sense amplifier need not operate if its output is latched after the output of the read data has been established. Therefore, it has been clarified by us that the single-chip micon of the prior art wastes power in the sense amplifier.
In a semiconductor memory such as a static RAM proposed in the prior art, on the other hand, the operation of the sense amplifier is interrupted so as to reduce power consumption after the output of the read data has been established. Despite this fact, however, a single device memory such as a static RAM rather than an on-chip type is operated by a control signal such as a chip enable signal fed from the micon but does not receive an external timing pulse (a clock pulse). Here, in order to reduce power consumption, it is advisable to operate the sense amplifier dynamically. In order that the sense amplifier may operate dynamically without any external feed of a special timing pulse, however, it is necessary to provide a built-in timing generation circuit such as an address change detection circuit for generating a timing signal by detecting the changes in an address signal fed from the outside. When this is done, however, the timing generation circuit must be large and complex to handle the large number of address bits.
Next, in the single-chip micon of the aforementioned EPROM mounted type (including the on-chip type), generally speaking the number of circuit elements composing a decoder for the EPROM is larger than that of the dynamic type, if the decoder to be constructed is of the static type as in the prior art. This raises another disadvantage, in that the decoder occupies a larger area and wastes power.
Here, the single-chip micon of the EPROM mounted type has therein clocks indicating the timing in the mode (hereafter referred to as a "micon mode") where it operates an ordinary microcomputer. This makes it easy to operate the EPROM decoder dynamically. Since, however, there is no suitable timing signal in the operation mode (hereafter referred to as an "EPROM mode") for writing the EPROM, still another disadvantage arises in that it is necessary, for example, either to provide such a circuit inside the chip as will generate a timing signal for operating the decoder dynamically by detecting the changes in the address signal or to generate and feed such a signal in an external EPROM writer.